https://yannick-bornat.enseirb-matmeca.fr/wiki/ 2026-05-26T17:29:11+00:00 https://yannick-bornat.enseirb-matmeca.fr/wiki/ https://yannick-bornat.enseirb-matmeca.fr/wiki/lib/exe/fetch.php/wiki:dokuwiki.svg text/html 2023-11-09T22:08:17+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:accueil?rev=1699567697&do=diff VHDL resources for PMod control in lab sessions This page is intended to provide control module to the PMods available in lab sessions at ENSEIRB. ---------- Project files * link to Nexys4 documentation * link to Nexys4DDR documentation * available peripherals on the Nexys4(DDR) board ---------- Sensors * Ambiant light sensor (ALS) Pmod controler * Distance measurement : SONAR Pmod controler * Nexys4 embedded MEMS microphone Human Interface input Device (HID) text/html 2022-09-07T13:23:46+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:mems_micro?rev=1662557026&do=diff MEMS microphone controler This module controls the MEMS microphone embedded on the Nexys4 board and outputs its data ([ figure source]) Using this module Just configure the generic values and enjoy the sample on data_out when data_en = '1'. data_en is set at the text/html 2023-11-09T22:16:10+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:old_vga_bitmap?rev=1699568170&do=diff Bitmap VGA output (Old version / Deprecated) ---------- WARNING This page is kept only to keep continuity with the previous modules. For new designs, prefer the new version. ---------- Before the implementation of any of these modules, please, check if your design leaves enough memory resources for the required memory. Logic requirements are negligible and working frequency is above 395MHz in most cases. text/html 2023-10-11T11:08:30+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:peripherals?rev=1697022510&do=diff List of available peripherals on the Nexys4 / Nexys4DDR / Nexys A7 boards skills scale * Noob : What is VHDL ? * Beginner : Should I take a counter or a FSM ? * Average : YES ! Finally got rid of that latch ! * Confirmed : Strange, I was expecting less FF usage in my design text/html 2023-11-05T21:41:08+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:pmod_i2s2?rev=1699220468&do=diff documentaton to come ... only one mode available so far : 16bits @ 44.1kHz [ module file] text/html 2022-09-07T13:22:50+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:pmodals?rev=1662556970&do=diff Ambiant light sensor controler The module described here make it possible to retreive the ambiant light value from the PmodALS device. ([ figure source]) ---------- This module constantly outputs the last measured value on the light sensor. To refresh this value, set the text/html 2023-10-11T09:01:57+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:pmodkypd?rev=1697014917&do=diff PMOD_KYPD : 16-key hex pad The module described here makes it possible to retrieve data from the PMOD_KYPD keyboard. ([ figure source]) ---------- This module constantly outputs the status of the keys ('1' pressed / '0' released) as if they were 16 independent push buttons. More details are available in the comments of the module itself. text/html 2022-09-07T13:26:34+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:pmodoled?rev=1662557194&do=diff OLED ASCii Display This module displays ASCii coded text on the OLED Display Pmod. It provides an interface that makes it possible to control each display character individually. This module is (by far) sub-optimal and may be improved by several means. This could by the objective of a student project. text/html 2022-09-07T13:26:07+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:pmodoledrgb?rev=1662557167&do=diff Pmod OLED RGB This page is about different controlers for the Pmod OLED RGB. ([ figure source ]) * reference page on Digilent website * [ Pmod datasheet ] The main control sequence is partially based on the work of Clovis Durand and Xavier Marino, who adapted the original C++ sources from digilent in a VHDL architecture. This work was performed during the S8 transversal projects 2017 at ENSEIRB-Matmeca. text/html 2022-09-07T13:23:20+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:pmodsonar?rev=1662557000&do=diff SONAR Pmod controler The module described here makes it possible to retreive the distance detected by the proximity detector PmodSONAR. ([ figure source]) ---------- This module constantly outputs the distance measured by the SONAR Pmod. The output value (data_out text/html 2022-09-07T13:27:21+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:rand?rev=1662557241&do=diff random_gen_V1 This module provides pseudo-random values. It uses a Linear Feedback Shift Register (LFSR). It is based on the Xilinx application note XAPP052 as reference for LFSR values. Although generating Random values is possible using the FPGA analog source, this module prefers generating pseudo-random value to improve module portability and give the opportunity to repeat the same computation for debugging. text/html 2022-09-07T13:25:11+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:sdcard?rev=1662557111&do=diff SDcard management module This page is about modules to read and write data to SDcards. All the modules are actually based on a single module that makes it possible to perform low level accesses, the SDcard_raw_access_v2 module. These modules have been tested with a large pannel of SD / SDHC cards. Testing on SDXC cards is still lacking. text/html 2023-11-05T21:35:37+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:uart?rev=1699220137&do=diff UART Interface The modules described here make it possible to transfer data from a standard computer to a FPGA board through a UART link. On the computer side, specific software must be used to exchange data, the most convenient is TeraTerm which is already installed on most ENSEIRB-MATMECA computers. text/html 2023-11-05T21:45:29+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:vga_ascii?rev=1699220729&do=diff ASCii VGA output Module documentation to come... Files * [ file for 320x240 pixels resolution] * [ file for 640x480 pixels resolution] Known bugs text/html 2023-11-05T22:02:47+00:00 Anonymous (anonymous@undisclosed.example.com) https://yannick-bornat.enseirb-matmeca.fr/wiki/doku.php/en202:vga_bitmap?rev=1699221767&do=diff Bitmap VGA output WARNING : The module has recenty been updated... some information here might be obsolete... contact me for confirmation. Before the implementation of any of these modules, please, check if your design leaves enough memory resources for the required memory. Logic requirements are negligible and working frequency is high enough in most cases.